MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1021

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 15-25
Freescale Semiconductor
Current list descriptor Address Register
describes the DMA transaction flow.
List Descriptor
List Descriptor
List Descriptor
Descriptors In Memory
Link Descriptor (EOLND/EOLSD)
Link Descriptor (EOLND)
Link Descriptor (EOLND)
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
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Link Descriptor
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Link Descriptor
Link Descriptor
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Link Descriptor
Link Descriptor
Link Descriptor
Figure 15-25. DMA Transaction Flow with DMA Descriptors
DMA Controller Flow (Extended Mode)
MR n [CS] is set by software after programming
descriptors in memory
Fetch the first list descriptor using the CLSDAR n address
Write NLSDAR n , CLNDAR n
Fetch the first link descriptor
Write programming model registers
Begin DMA transfer using SAR n , SATR n , DAR n , DATR n
After transfer check if NLNDAR n [EOLND] is set
Move NLNDAR n to CLNDAR n
Fetch the current link descriptor
Write programming model registers
Begin DMA transfer using SAR n , SATR n , DAR n , DATR n
After DMA transfer check if NLNDAR n [EOLND] is set
Check if NLSDAR n [EOLSD] is set
Move NLSDAR n to CLSDAR n
Fetch the current list descriptor
Write NLSDAR n , CLNDAR n
Move NLNDAR n to CLNDAR n
Fetch the first link descriptor
Write programming model registers
Begin DMA transfer using SAR n , SATR n , DAR n , DATR n
After DMA transfer check if NLNDAR n [EOLND] is set
Move NLNDAR n to CLNDAR n
Fetch the current link descriptor
Write programming model registers
Begin DMA transfer using SAR n , SATR n , DAR n , DATR n
After DMA transfer check if NLNDAR n [EOLND] is set
Check if NLSDAR n [EOLSD] is set
Move NLSDAR n to CLSDAR n
Fetch the current list descriptor
Write NLSDAR n , CLNDAR n
Fetch the first link descriptor
Write programming model registers
Begin DMA transfer using SAR n , SATR n , DAR n , DATR n
After DMA transfer check if NLNDAR n [EOLND] is set
Move NLNDAR n to CLNDAR n
Fetch the current link descriptor
Write programming model registers
Begin DMA transfer using SAR n , SATR n , DAR n , DATR n
After DMA transfer check if NLNDAR n [EOLND] is set
Check if NLSDAR n [EOLSD] is set
Clear SR n [CB]
DMA Transfer Complete
DMA Controller
Finish
Start
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