MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 6

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Paragraph
Number
4.4.3.10
4.4.3.11
4.4.3.12
4.4.3.13
4.4.3.14
4.4.3.15
4.4.3.16
4.4.3.17
4.4.3.18
4.4.3.19
4.4.3.20
4.4.3.21
4.4.3.22
4.4.3.23
4.4.3.24
4.4.3.25
4.4.4
4.4.4.1
4.4.4.2
4.4.4.2.1
4.4.4.3
4.4.4.4
4.5
4.5.1
4.5.1.1
4.5.1.1.1
4.5.1.1.2
4.5.1.1.3
4.5.1.1.4
4.5.1.1.5
4.5.1.1.6
4.5.1.2
4.5.1.2.1
4.5.1.2.2
4.5.1.2.3
4.5.1.2.4
4.5.1.3
vi
Initialization/Applications Information ......................................................................... 4-27
Clocking..................................................................................................................... 4-24
System Boot............................................................................................................... 4-27
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
CPU Boot Configuration ....................................................................................... 4-17
Boot Sequencer Configuration .............................................................................. 4-18
DDR SDRAM Type............................................................................................... 4-19
Serdes 2 Reference Clock Configuration .............................................................. 4-19
eTSEC1 width........................................................................................................ 4-20
eTSEC3 Width ....................................................................................................... 4-20
eTSEC1 Protocol ................................................................................................... 4-21
eTSEC3 Protocol ................................................................................................... 4-21
PCI Clock Selection............................................................................................... 4-22
PCI Speed Configuration ....................................................................................... 4-22
PCI I/O Impedance ................................................................................................ 4-22
PCI Arbiter Configuration ..................................................................................... 4-23
Memory Debug Configuration .............................................................................. 4-23
DDR Debug Configuration.................................................................................... 4-23
General-Purpose POR Configuration .................................................................... 4-24
Engineering Use POR Configuration .................................................................... 4-24
System Clock/PCI Clock/DDR Clock ................................................................... 4-24
PCI Express and SGMII Clocks ............................................................................ 4-25
Ethernet Clocks...................................................................................................... 4-26
Real Time Clock .................................................................................................... 4-26
eSDHC Boot .......................................................................................................... 4-27
eSPI Boot ROM..................................................................................................... 4-35
Default e500 Addressing During System Boot ..................................................... 4-41
Minimum Frequency Requirements .................................................................. 4-26
Overview ........................................................................................................... 4-27
Features.............................................................................................................. 4-28
SD/MMC Card Data Structure .......................................................................... 4-29
eSDHC Controller Initial Configuration ........................................................... 4-33
eSDHC Controller Boot Sequence .................................................................... 4-33
eSDHC Boot Error Handling............................................................................. 4-34
Overview ........................................................................................................... 4-35
Features.............................................................................................................. 4-36
EEPROM Data Structure................................................................................... 4-36
eSPI Controller Configuration........................................................................... 4-40
Contents
Title
Freescale Semiconductor
Number
Page

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