MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1352

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Universal Serial Bus Interfaces
Table 21-13
when used in host mode.
21.3.2.5
The CTRLDSSEGMENT register is not implemented on the MPC8536E.
21.3.2.6
This register contains the beginning address of the Periodic Frame List in the system memory. The host
controller driver loads this register prior to starting the schedule execution by the controller. The memory
structure referenced by this physical memory pointer is assumed to be 4-Kbyte aligned. The contents of
this register are combined with the frame index register (FRINDEX) to enable the controller to step
through the Periodic Frame List in sequence.
Note that this register is shared between the host and device mode functions. In host mode, it is the
PERIODICLISTBASE register; in device mode, it is the DEVICEADDR register. See
“Device Address Register (DEVICEADDR)—Non-EHCI,”
21-18
31–14
13–0
Bits
FRINDEX Frame index. The value in this register increments at the end of each time frame (for example, microframe).
Name
illustrates values of N based on the value of the Frame List Size in the USBCMD register,
Control Data Structure Segment Register (CTRLDSSEGMENT)
Periodic Frame List Base Address Register (PERIODICLISTBASE)
Reserved, should be cleared.
Bits N–3 are used for the Frame List current index. This means that each location of the frame list is
accessed 8 times (frames or microframes) before moving to the next index.
In device mode, the value is the current frame number of the last frame transmitted. It is not used as an
index.
In either mode, bits 2–0 indicate the current microframe.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
USBCMD[FS]
000
001
010
011
100
101
110
111
Table 21-12. FRINDEX Register Field Descriptions
Table 21-13. FRINDEX N Values
1024 elements (4096 bytes)
512 elements (2048 bytes)
256 elements (1024 bytes)
128 elements (512 bytes)
64 elements (256 bytes)
32 elements (128 bytes)
16 elements (64 bytes)
8 elements (32 bytes)
Frame List Size
Description
for more information.
FRINDEX N value
12
11
10
9
8
7
6
5
Freescale Semiconductor
Section 21.3.2.7,

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