MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1605

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.3.3.2
The current context ID register (CCIDR) shown in
register is written by software after a context switch and can be used to trigger events when compared with
the programmed context ID register (PCIDR).
Table 25-24
25.3.4
TRIG_OUT provides a convenient mechanism for triggering external system monitors and diagnostic
equipment such as logic analyzers. Note that READY is multiplexed with TRIG_OUT. See the last
paragraph of
functionality.
When the trace buffer hit is selected by TOSR[SEL], TRIG_OUT is only meaningful if the trace buffer
control register 0 (TBCR0) is properly configured to hit on a traceable event. The same holds true for the
watchpoint monitor when the watchpoint monitor is selected by TOSR[SEL].
25.3.4.1
The trigger out source register (TOSR) shown in
three event-trigger sources are the following:
Freescale Semiconductor
0–31
Bits
Offset 0x0A4
Offset 0x0B0
Reset
Reset
•
•
•
W
W
R
R
The watchpoint monitor
The trace buffer
The performance monitor
Name
CCID
0
0
Trigger Out Function
describes the CCIDR field.
Section 4.4.2, “Power-On Reset Sequence,”
Current Context ID Register (CCIDR)
Trigger Out Source Register (TOSR)
—
Current context ID. Set by user software. Typically loaded immediately following a context switch. Compared
with user-programmed context ID for context-sensitive event triggering
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
4
5
SEL
Figure 25-18. Current Context ID Register (CCIDR)
Figure 25-19. Trigger Out Source Register (TOSR)
7
8
Table 25-24. CCIDR Field Descriptions
Figure 25-19
Figure 25-18
All zeros
All zeros
CCID
Description
for more information about READY
specifies the source for TRIG_OUT. The
contains the current context ID. This
—
Debug Features and Watchpoint Facility
Access: Read/Write
Access: Read/Write
31
31
25-23