MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1628

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Complete List of Configuration, Control, and Status Registers
A.1.12
A-16
0x164–
Offset
0x02C
0x10C
0x14C
0x15C
0x17C
0x000
0x008
0x010
0x018
0x020
0x024
0x028
0x030
0x034
0x038
0x100
0x104
0x108
0x140
0x144
0x148
0x150
0x154
0x158
0x160
0x410
Serial ATA Controllers
CQR—Command queue register
CAR—Command active register
CCR—Command completed register
CER—Command error register
DER—Device error register
CHBA—Command header base address
HStatus—Host status register
HControl—Host control register
CQPMP—Port number queue register
SIG—Signature register
ICC—Interrupt coalescing control register
SStatus—SATA interface status register
SError—SATA interface error register
SControl—SATA interface control register
SNotification—SATA interface notification register
TransCfg—Transport layer configuration
TransStatus—Transport layer status
LinkCfg—Link layer configuration
LinkCfg1—Link layer configuration1
LinkCfg2—Link layer configuration2
LinkStatus—Link layer status
LinkStatus1—Link layer status1
PhyCtrlCfg1—PHY control configuration1
CommandStatus—Link layer command status
Reserved
SYSPR—System priority register
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
SATA Controller 1—Block Base Address 0x1_8000
SATA Controller 2—Block Base Address 0x1_9000
Register
SATA1 System Control Registers
SATA1 Control Status Registers
Table A-12. SATA Registers
SATA Command Registers
SATA1 Superset Registers
Access
Mixed
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
w1c
w1c
w1c
w1c
w1c
—
R
R
R
R
R
R
R
0xFFFF_FFFF
0x0000_FF34
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x2000_0000
0x0000_0100
0x0000_0000
0x0100_0000
0x0000_0000
0x0000_0000
0x0000_0300
0x0000_0000
0x0800_0016
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_3800
0x0000_0000
0x0000_0000
Reset
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