MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1135

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.3.6.6.2
PEX_ERR_CAP_R1 for the case when the error is caused by an inbound transaction from an external
source (that is, PEX_ERR_CAP_STAT[GSID] = 0h02 for controller 1), is shown in
Table 17-30
in PEX_ERR_CAP_R0 (see
transaction.
Freescale Semiconductor
Offset 0xE2C
Reset
W
R
0
24–31
0–23
0–31
Bits
Bits
describes the fields of PEX_ERR_CAP_R1 for the case when the FMT and TYPE subfields
PEX_ERR_CAP_R1—Inbound Case
Figure 17-31. PCI Express Error Capture Register 1 (PEX_ERR_CAP_R1)
Table 17-29. PCI Express Error Capture Register 1 Field Descriptions
Table 17-30. PCI Express Error Capture Register 1 Field Descriptions
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Name
Name
OD0
GH1
Reserved
Internal platform transaction information. Reserved for factory debug.
PEX second DW (4-byte) header. This field contains the second DW (4-byte) of the
captured PCI Express packet header.
24–31
16–23
12–15
11
8–10
0–7
External Source, Inbound CompletionTransaction
Table
Internal Source, Outbound Transaction
External Source, Inbound Transaction
17-28) indicate the error was caused by an inbound completion
Comp ID[15:8]
Comp ID[7:0]
Byte Count[11:8]
BCM
Comp Status
Byte Count[7:0]
All zeros
GH1
Description
Description
PCI Express Interface Controller
Figure
Access: Read/Write
17-31.
17-39
31

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