MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1141

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

programmed in the PEX_CONFIG_ADDR register. There is no configuration mechanism supported in EP
mode using the ATMU window. If the outbound ATMU window is configured to issue a configuration
transaction, all posted transactions hitting this window are ignored and all non-posted transactions get a
response with an error.
17.3.8
The first 64 bytes of the 256-byte PCI compatible configuration space consists of a predefined header that
every PCI device must support. The first 16 bytes of the predefined header are defined the same for all PCI
Express devices. These common registers are shown in
The remaining 48 bytes of the header may have differing layouts depending on the function of the device.
There are two header types applicable to PCI Express. Type 0 headers are typically used by endpoints;
Type 1 headers are used by root complexes and switches/bridges.
17.3.8.1
This section details the registers that are common to both type 0 and type 1 configuration headers.
17.3.8.1.1
The vendor ID register, shown in
Table 17-37
17.3.8.1.2
The device ID register, shown in
Freescale Semiconductor
Offset 0x00
Reset
Reserved
W
R
15–0
15
Bits
0
Figure 17-36. PCI Express PCI-Compatible Configuration Header Common Registers
PCI Compatible Configuration Headers
BIST
describes the vendor ID register fields.
Common PCI Compatible Configuration Header Registers
PCI Express Vendor ID Register—Offset 0x00
PCI Express Device ID Register—Offset 0x02
0
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 17-37. PCI Express Vendor ID Register Field Description
0
Device ID
Vendor ID
Status
Name
1
Figure 17-37. PCI Express Vendor ID Register
Figure
Header Type
Class Code
Figure
1
0x1957 (Freescale)
0
17-38, is used to identify the device.
17-37, is used to identify the manufacturer of the device.
0
Vendor ID
1
Figure
Latency Timer
0
Description
17-36.
1
Command
0
Vendor ID
1
PCI Express Interface Controller
Cache Line Size
Revision ID
0
Access: Read only
1
Offset (Hex)
Address
1
00
04
08
0C
1
17-45
0