MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1077

Manufacturer Part Number

BOARD DEV SYSTEM MPC8536E

Manufacturer

Freescale Semiconductor

PowerQUICC III™r

Board, Software and Documentation

Processor Series

Data Bus Width

Maximum Clock Frequency

Operating Supply Voltage

- 0.3 V to + 1.21 V

Maximum Operating Temperature

Data Ram Size

Interface Type

Program Memory Type

DDR2, DDR3, SDRAM

Program Memory Size

Digital Ic Case Style

Supply Voltage Range

0.95V To 1.05V

Rohs Compliant

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Figure 16-49

Figure 16-50

This section describes PCI single-beat write transactions, and PCI burst write transactions. A PCI write

transaction starts with the address phase, occurring when an initiator asserts PCI_FRAME. A write

transaction is similar to a read transaction except no turnaround cycle is needed following the address

phase because the initiator provides both address and data. The data phases are the same for both read and

write transactions. Although not shown in the figures, the initiator must drive the PCI_C/BE[3:0] signals,

even if the initiator is not ready to provide valid data (PCI_IRDY negated).

Freescale Semiconductor

illustrates a PCI single-beat read transaction.

illustrates a PCI burst read transaction.

PCI Write Transactions

MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1

Figure 16-49. PCI Single-Beat Read Transaction

Figure 16-50. PCI Burst Read Transaction

Byte Enables 1

Byte Enables

Byte Enables 2

PCI Bus Interface