MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 632

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DUART
12.3.1.9
The UMCRs control the interface with the external peripheral device on the UART bus.
Figure 12-11
Table 12-15
.
12-14
Bits
0–2
4–5
3
6
7
Offset UART0: 0x504, UART1: 0x604
Reset
Name
LOOP Local loopback mode.
RTS
W
R
describes the fields of UMCRs.
shows the bits in the UMCRs
Reserved.
0 Normal operation
1 Functionally, the data written to UTHR can be read from URBR of the same UART, and UMCR[RTS] is tied
Reserved.
Ready to send.
0 Negates corresponding UART_RTS output
1 Assert corresponding UART_RTS output. Informs external modem or peripheral that the UART is ready for
Reserved.
Table 12-14. Parity Selection Using ULCR[PEN], ULCR[SP], and ULCR[EPS]
Modem Control Registers (UMCR n )
to UMSR[CTS].
sending/receiving data
0
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 12-11. Modem Control Register (UMCR)
Table 12-15. UMCR Field Descriptions
PEN
0
0
0
0
1
1
1
1
2
SP
0
0
1
1
0
0
1
1
LOOP
EPS
0
1
0
1
0
1
0
1
3
All zeros
Description
Parity Selected
Space parity
Even parity
Mark parity
Odd parity
No parity
No parity
No parity
No parity
4
5
Freescale Semiconductor
RTS
Access: Read/Write
6
7

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