MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 122

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Overview
1.2
This section provides a high-level overview of MPC8536E.
within the device.
1.2.1
Key features of the MPC8536E include:
2
MMC
SD
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High-performance PowerPC e500v2 core with 36-bit physical addressing
512-Kbyte L2 cache with ECC
Low power consumption
Integrated security engine (SEC) with XOR acceleration
Advanced power management controller
Jog mode feature allows core frequency to be adjusted to optimize power consumption
Three USB dual-role controllers (host/device)
Two integrated 10/100/1000 Mb enhanced three-speed Ethernet controllers (eTSECs) with TCP/IP
acceleration and classification capabilities. Additional features include
— SGMII (serial GMII) interface support, through the SerDes interface)
— Hardware support for IEEE Std. 1588™ precision time protocol
Three PCI Express® controllers utilizing the SerDes interface
Two serial ATA interfaces
DDR2/DDR3 SDRAM memory controller
MPC8536E Overview
Performance
Device
Host/
ULPI
USB
Monitor
Key Features
Timers
MPC8536E
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Device
Host/
ULPI
USB
Enhanced
Local Bus
Device
Host/
ULPI
USB
Figure 1-1. MPC8536E Block Diagram
SEC
SATA
32-Kbyte
D-Cache
e500 Core
OpenPIC
SATA
2 Lane SERDES
32-Kbyte
I-Cache
w/ IEEE 1588
Ethernet
SGMII
Gigabit
Coherency
Module
Figure 1-1
512-Kbyte
L2 Cache
w/ IEEE 1588
Ethernet
SGMII
Gigabit
DUART
2x I
shows the major functional units
eSPI
2
C
Management
Queue
Async
PCI 32
PCI-e
Power
Freescale Semiconductor
8 Lane SERDES
SDRAMController
PCI-e
DDR2/DDR3
with ECC
64-bit
PCI-e
DMA