MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1148

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCI Express Interface Controller
Table 17-46
Base address register 1 at offset 0x14 is used to define the inbound memory window in the 32-bit memory
space. The 32-bit memory BAR is shown in
Table 17-47
Base address register 2 at offset 0x18 and base address register 4 at offset 0x20 are used to define the lower
portion of the 64-bit inbound memory windows. The 64-bit low memory BARs are shown in
17-52
Offset 0x14 (EP-mode only)
Offset 0x10
Reset
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
31–12
11–4
Bits
2–1
3
0
W
W
R
R
31–20 ADDRESS Indicates the base address that the inbound configuration window occupies. This window is fixed
19–4
Bits
2–1
3
0
31
31
ADDRESS
MemSp
Name
PREF
TYPE
describes the PCI Express configuration and status register base address register.
describes the PCI Express 32-bit memory BAR fields.
MemSp
—
Name
PREF
TYPE
Table 17-47. 32-Bit Memory Base Address Register (BAR1) Field Descriptions
—
ADDRESS
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 17-47. PCI Express Base Address Register 0 (PEXCSRBAR)
Indicates the base address where the inbound memory window begins. The number of upper bits that
the device allows to be writable is selected through the inbound window size in the inbound window
attributes register (PEXIWAR1).
Reserved. The device allows a 4 Kbyte window minimum.
Prefetchable. This bit is determined by PEXIWAR1[PF].
Type.
00 Locate anywhere in 32-bit address space.
Memory space indicator.
at 1 Mbyte.
Reserved
Prefetchable
Type.
00 Locate anywhere in 32-bit address space.
Memory space indicator
Figure 17-48. 32-Bit Memory Base Address Register (BAR1)
ADDRESS
Table 17-46. PEXCSRBAR Field Descriptions
20 19
Figure
17-48.
All zeros
—
Description
12 11
Description
—
4
4
PREF
3
PREF
1
3
Freescale Semiconductor
2
0
TYPE
2
TYPE
Figure
Access: Mixed
Access: Mixed
1
0
1
MemSp
MemSp
17-49.
0
0
0